The on-board charger (OBC) is a box with two very different power stages inside it, and the efficiency number on the datasheet hides both of them. Up front, the PFC stage wants speed — fast diodes that can switch at high frequency to clean up the grid-side power factor. Behind it, the DC-DC stage wants low loss — rectifiers that squeeze every fraction of a percent out of the high-current conversion. One headline efficiency figure combines them, and a designer who picks one diode for “the OBC” will be wrong in one of the two places. This article separates the two mindsets, sizes the PFC and DC-DC diodes against their own jobs, budgets the thermal across both stages, and closes with a validation matrix that verifies the claim.
Two Mindsets in One Box: PFC vs DC-DC Stage Thinking
The OBC architecture is a chain: AC from the wall, a PFC stage that corrects the power factor, a DC-DC stage that converts to the battery voltage, and the battery on the far side. The two conversion stages are physically in the same box and electrically in series, but they demand opposite things from their diodes, which is why the efficiency number hides a split.
The PFC stage is the front end. It runs at the grid frequency and its harmonics, switching at tens to hundreds of kilohertz to shape the input current and hold the power factor near unity. Its diodes are stressed by the switching speed and the recovery events of the high-frequency switching; the mindset is speed — fast recovery, low per-switch loss, and the ability to handle the switching-rate stress of the PFC algorithm. The DC-DC stage is the rear end. It converts the PFC output down to the battery voltage at high current, and its diodes carry tens of amps continuously; the mindset is loss control — low forward drop, low conduction loss, and the thermal budget to shed the heat. The on-board charger rectifier article and the OBC architecture trends article develop the two stages; this article adds the efficiency-budgeting method that splits the headline number.
The one-efficiency-number problem is that a 95% OBC can be a 97% PFC paired with a 93% DC-DC, or vice versa, and the two designs are not the same product even though the headline matches. The honest OBC design starts by budgeting the efficiency stage by stage, and the sections below build that budget.
PFC Stage: SiC SBD and the Speed That Pays
The PFC stage’s diodes are chosen by speed, and the modern answer is often a silicon carbide Schottky barrier diode (SiC SBD) where the switching frequency is high enough for its advantages to pay.
The PFC diode’s job is to conduct and block at the switching frequency with low loss per event. A fast recovery diode keeps the reverse-recovery energy small at high frequency, and the SiC SBD adds a low forward drop and excellent high-temperature behavior on top. The trade is the classic one: the SiC SBD costs more than silicon, and it pays only when the switching frequency is high enough that recovery losses and the switching rate justify the price. The SiC SBD article and the SiC in PFC article cover when the material’s speed pays, and the CCM PFC efficiency article shows the measured efficiency and EMI effect of the SiC SBD in a real PFC stage.
The selection rule for the PFC diode is to compare the total loss at the operating frequency — conduction plus switching plus recovery — for the silicon fast-recovery and the SiC candidates. The diode loss calculation sheet is the tool that makes the comparison numeric: at high frequency the per-event terms multiply by the switching rate, and the faster part wins the budget even when its upfront cost is higher.
DC-DC Stage: Low-Loss Rectification and Sync Options
The DC-DC stage flips the mindset: here the diode is chosen by loss at high current, and the options range from a low-VF Schottky to full synchronous rectification.
The DC-DC output rectifier carries the battery current — tens of amps — and each hundredth of a volt of forward drop is a watt of loss at 100 A. A Schottky’s low VF is the first lever; a synchronous rectifier, where a MOSFET takes over the rectifier’s role with an on-resistance loss far below a diode’s VF, is the second. The choice is an efficiency-versus-complexity trade: the Schottky is simple and low-drop, while the synchronous rectifier adds a controller and switching losses but removes the diode drop entirely. The synchronous rectifier MOSFET article and the low-VF Schottky article cover the two options, and the 250 V loss worksheet runs the comparison on a concrete output stage.
The DC-DC selection rule is conduction-first: read the VF at the operating current and temperature, multiply by the average current for the conduction loss, and compare against the synchronous option’s on-resistance loss plus its control overhead. The thermal budget then decides whether the chosen part closes the junction-temperature check at the OBC’s ambient. The rectifier selection for SMPS and the loss calculation sheet supply the numeric method the DC-DC stage uses.
Thermal Budget Across the OBC
The two stages share one thermal budget, and the budget is where the two mindsets collide. The PFC stage’s switching loss and the DC-DC stage’s conduction loss both dissipate inside the charger enclosure, and the total must keep every junction at or below its derated limit at the worst ambient.
The budgeting method is additive. Compute the PFC stage loss with the frequency-dependent terms, compute the DC-DC stage loss with the current-dependent terms, and sum them to the total dissipation. Then run the junction-temperature checks — ambient plus each stage’s dissipation times its thermal resistance — and confirm both stay inside their limits with the derating applied. The OBC’s sealed or fan-cooled enclosure sets the ambient and the airflow, and the rectifier thermal design guide and the thermal management case provide the thermal method for both packages.
The cross-stage surprise is that the two stages trade against each other. A silicon carbide PFC diode removes loss from the front stage but adds nothing to the DC-DC; a synchronous DC-DC removes the rear-stage drop but adds control complexity its own switching loss. The design that closes the budget is the one that spends each stage’s allowance where it pays most, and the OBC rectifier design article and the efficiency worksheet make the split explicit.
The efficiency-budgeting workbook is the tool that splits the headline number, and a small table shows its shape. The rows are the stages, the columns are the loss terms, and the total is the number the datasheet quotes:
| Stage | Conduction loss term | Switching/recovery term | Stage efficiency |
|---|---|---|---|
| PFC input | VF x I_avg (low current) | f x E_switch + f x E_rec (high frequency) | 97% target |
| DC-DC output | VF x I_avg (high current) | f x E_switch (moderate frequency) | 93-95% target |
| Synchronous option | RDS(on) x I^2 (near-zero) | Controller overhead + its own switching | 95-96% target |
The workbook makes the two mindsets numeric. The PFC row is dominated by the switching terms — the frequency times the per-event energy — so a fast part wins there. The DC-DC row is dominated by the conduction terms — VF times the tens of amps — so a low-drop or synchronous part wins there. Filling in the sheet with the actual operating point is the design act this article exists to enable, and the loss calculation sheet is the reference that defines each term.
The workbook also prevents the most common OBC error, which is optimizing the wrong stage. A designer who spends the entire efficiency budget on a SiC PFC diode while the DC-DC rectifier burns the same percentage in VF has bought the wrong part at the wrong end of the box. The sheet shows where the loss actually lives, and it redirects the budget to the stage with the largest terms — which is frequently the high-current DC-DC output, where a synchronous rectifier pays for itself in months of plug-in time.
The 250 V loss worksheet runs the same workbook on a concrete output stage, and the rectifier selection for SMPS extends the role map to the whole charger family. The workbook, the two mindsets, and the thermal budget together are the OBC diode design method.
Validation Matrix: Efficiency, EMI, and Reliability
The last step is proving the two-stage design delivers the efficiency the datasheet claims, and the validation matrix covers efficiency, EMI, and reliability separately because the three are verified differently.
The efficiency corner is measured with a power analyzer at the input and output across the operating range — the stage-by-stage loss split should match the budget, not just the headline total. The EMI corner is tested at the switching frequencies and their harmonics, because the PFC stage’s fast switching is the primary EMI generator and the DC-DC stage’s ripple adds its own content; the surge and ESD testing guide and the SiC PFC article frame the EMI test. The reliability corner is the thermal cycle and the mission profile — the OBC in a vehicle sees vibration, heat, and power-cycling, and the thermal cycling guide and the field reliability checklist close the reliability loop.
The validation matrix is the completion of the two-mindset design. PFC and DC-DC are two stages with two different diode decisions, one efficiency number that hides both, and one thermal budget that unifies them. The OBC is designed correctly by splitting the efficiency claim stage by stage, choosing speed in the PFC and low loss in the DC-DC, budgeting the heat across the box, and validating all three corners with the matrix. The power MOSFET category and the SiC SBD category supply the parts the two stages land on, and the OBC architecture article places the design in the current vehicle trend.