What Is an SOD-523 ESD Protection Diode?
Learn how to select an SOD-523 ESD protection diode with verified package dimensions, TVS polarity, capacitance, voltage ratings and PCB layout checks.

Updated: October 28, 2026
SOD-523 is an ultra-small outline used for low-capacitance ESD and small-signal diodes when board area is tight. The package does not define protection level by itself—VRWM, capacitance, and clamp performance of the die do.
What the SOD-523 package actually buys you
Distinguish the component body, its terminals and the PCB land pattern. In Diodes Incorporated’s DS43793, page 4, the SOD523 body is 1.15–1.25 mm long and 0.75–0.85 mm wide, with 0.55–0.65 mm height. The span including leads is 1.55–1.65 mm; the suggested pad-layout dimension X1 is 2.00 mm. Body size, lead span and soldering layout are different measurements.
Use the dimensioned drawing for tolerances and the exact supplier’s recommended footprint for PCB design. Another manufacturer’s drawing may use different dimension letters or land-pattern recommendations even when the outline has the same package name. The cathode marking and viewing direction also need to match the schematic.
A smaller body can help a dense board, but it does not establish the installed area per protected line or the available transient capability. Compare the full footprint, number of channels, routing and specific electrical ratings. Neither a fixed percentage area saving nor a pulse-power ranking follows from the package name alone.
How the clamp actually works
A shunt TVS normally presents a high impedance within its specified working range. During an appropriate transient it conducts current away from the protected node. Leakage, breakdown and clamping voltage describe different parts of that behavior; none should be treated as a universal value for SOD-523 devices.
Unidirectional does not mean protection against only one transient polarity. With the cathode on a positive line and the anode at the return, positive excursions can produce reverse-avalanche clamping, while negative excursions can produce forward conduction. A bidirectional TVS has blocking and clamping behavior in both directions. ST’s AN5887, section 2 illustrates these different current-voltage characteristics.
Choose the topology from the entire normal signal swing and both transient polarities. A unidirectional part installed the wrong way across a positive supply can become forward biased. Conversely, a correctly oriented part can load a signal that legitimately swings negative. Check the actual device schematic, voltage window and transient curves instead of assigning a topology to every USB, audio or antenna line.
The voltage reaching the IC also depends on current, early overshoot and the PCB path. A response-time claim without its measurement conditions does not establish protection. A clamp commonly returns to its low-leakage state after a supported event, but a damaged part need not recover.
The specification table to work from
Read parameters for an identified part under their stated conditions. The example below comes from Diodes Incorporated’s T5V0S5A data sheet, DS43793 Rev. 4-2, page 2; it is not a specification for Good-Ark products or all SOD-523 devices. Electrical values are stated at 25°C unless otherwise specified.
| Parameter | T5V0S5A example | Condition or interpretation |
|---|---|---|
| Reverse standoff voltage | 5.0 V | Specified working-voltage rating |
| Minimum breakdown voltage | 6.2 V | At 1 mA test current |
| Maximum clamping voltage | 17.3 V | At 15 A, 8/20 µs pulse |
| Typical total capacitance | 130 pF | At 0 V reverse bias and 1 MHz |
| IEC 61000-4-2 rating | ±30 kV air and contact | Manufacturer’s stated device ratings, not finished-product certification |
The 130 pF example shows why a small package does not necessarily mean low signal loading. Do not replace that condition with an unrelated capacitance at another bias or frequency. Typical values, guaranteed limits and test ratings answer different questions.
Set the working range from the highest normal line voltage, tolerances and relevant powered or unpowered states. Then evaluate the residual transient at the IC against supported transient withstand information. A DC absolute-maximum value alone is not a complete nanosecond ESD-immunity specification. Compare clamping data at a relevant current and waveform, rather than assuming the breakdown voltage is the clamp.
Keep peak power, continuous dissipation and energy separate. Peak pulse power is expressed in watts and belongs to a specified waveform; energy is the integral of voltage times current over time, expressed in joules. Neither a wattage nor an ESD voltage label establishes safe continuous exposure to an overvoltage source.

The layout rules that make the clamp work
Place the protection close to the point where the transient enters, with a short connection to its intended return. Route the protected signal through the clamp connection and avoid a long branch or stub. Review vias, ground-plane connections and the path near the IC together.
TI’s ESD Protection Layout Guide, SLVA680A explains how parasitic inductance and return-path impedance increase residual voltage. Shortening the clamp path and controlling its return can matter even when the selected diode survives its own test. The PCB must also preserve the signal’s impedance and loading requirements.
For data or RF lines, use the interface’s actual signal-integrity budget rather than a universal capacitance cutoff. Examine capacitance versus bias and frequency, package parasitics and insertion-loss information where available. Check the complete channel with the device installed.
A shunt TVS across a power rail does not normally carry the load current. Its steady dissipation comes principally from leakage in normal blocking operation; transient or fault conduction is a separate stress. Review temperature, pulse repetition and any required upstream fault interruption. An ESD clamp is not automatically a sustained-overvoltage disconnect.
Finally, distinguish component handling tests from system-level immunity. HBM and IEC 61000-4-2 ratings use different methods and cannot be substituted by comparing their voltage labels. Test the assembled port at the required discharge points, polarities and operating states, and record both permanent damage and unacceptable functional upset.
When SOD-523 is the right answer — and when it is not
SOD-523 can be a useful candidate for a single protected line when the exact device meets the voltage, signal-loading, transient and mounting requirements. For multiple lines, compare arrays using total occupied board area and routing rather than the body size of one component. For higher-energy or repeated disturbances, compare suitably rated protection architectures; the package name alone cannot settle the choice.
Keep this page focused on the package and its selection boundaries. Continue with the low-capacitance ESD guide for signal loading, the multi-line array guide for shared protection, and the TVS failure guide for layout, rating and repetition problems.
Before approving a part, record the exact ordering code, normal voltage window, transient waveform, relevant clamp curve, capacitance conditions and footprint. Review the hot and unpowered cases where applicable, then validate signal behavior and protection on the representative assembly. A matching package and a large ESD number are useful catalogue entries, but they are not the completed selection.
How do you keep SOD-523 ESD parts effective on the PCB?
Minimize the inductance between the protected pin, the diode, and the reference.
Long traces turn a fast ESD edge into residual voltage at the IC. Keep the suppressor next to the connector, avoid stubbing high-speed pairs through distant vias, and do not share a skinny return with noisy power grounds. For unidirectional vs bidirectional choices, see unidirectional surge diodes.
Package size versus protection rating
SOD-523 shrinks footprint and parasitic inductance versus larger SOD/SOT outlines, which helps high-speed lines—but peak pulse power and thermal mass are limited. Match the part’s ESD/IEC rating and clamping curve to the threat; do not assume “SOD-523 ESD diode” means a fixed kilovolt level.
Capacitance, signal integrity, and layout
On USB, HDMI, or RF-adjacent lines, diode capacitance can degrade edges. Competitors’ selection pages push low-pF parts plus short return paths to the protected IC. Place the diode at the connector, keep stub length minimal, and verify both VRWM and Cj on the datasheet.
Frequently asked questions
What is an SOD-523 ESD diode?
A tiny surface-mount package hosting an ESD/TVS or small-signal die for board-level transient protection.
Does the package set the ESD level?
No. The silicon rating and clamp behavior set protection; the package mainly sets size and parasitics.
Why care about capacitance?
Extra Cj can slow or distort high-speed signals.
Where should it be placed?
As close as practical to the entry connector with a short path to the reference plane.
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