MOSFET Thermal Design: Hot RDS(on), Power Loss and Junction Temperature

MOSFET thermal design starts with the resistance at the operating junction temperature, not only the value printed at 25 °C. Current, gate drive and the heat path determine how much channel conduction loss becomes temperature rise. This guide separates the current-squared effect from the temperature effect, then works through a consistent 24 V load-switch example.

Last updated: October 25, 2026

The Temperature That Raises Its Own Resistance: RDS(on) vs Junction

A MOSFET’s on-resistance is specified at stated gate voltage, drain current and temperature. In normal fully enhanced operation, it generally increases as the junction warms. Read the selected device’s R_DS(on)-versus-temperature curve and use the gate-drive conditions that apply to your circuit; a single temperature multiplier is not valid for every MOSFET.

For example, a change from 20 mΩ to 35 mΩ increases conduction loss by 35/20 = 1.75 at unchanged current. It does not, by itself, quadruple loss. The temperature multiplier is k(T) = R_DS(on)(T)/R_DS(on)(25 °C). Distinguish a typical temperature curve from a guaranteed resistance limit when setting margin.

ROHM’s on-resistance guide explains the gate-voltage, current and temperature conditions behind this calculation. For the trade-off between a lower resistance and switching-related costs, see the low-RDS(on) selection discussion.

Loss Formula: Why Squaring the Current Hurts Twice

For a fully enhanced channel carrying constant current, P_cond ≈ I²R_DS(on),hot. Doubling current at unchanged resistance gives four times the conduction loss. Doubling resistance at unchanged current gives twice the loss.

Current	Channel resistance	Conduction loss	Comparison
20 A DC	8 mΩ	3.2 W	Reference case
20 A DC	16 mΩ	6.4 W	Twice the resistance, twice the loss
40 A DC	8 mΩ	12.8 W	Twice the current, four times the loss

These are arithmetic examples, not measured device results. When current varies, define the averaging interval. Using current RMS over the whole cycle, including off time, gives P_cond,avg ≈ I_RMS,cycle²R_hot. If RMS is calculated over the on interval only, multiply by the on-time fraction D instead: P_cond,avg ≈ D I_RMS,on²R_hot. Do not apply D twice.

Those equations assume resistance can be approximated at the operating temperature and gate voltage. For changing conditions, average i(t)²R(t) over time. Add switching, body-diode and other losses that occur inside the MOSFET when estimating its total heating; channel conduction loss alone is not total converter loss.

Building the Thermal Loop: Rth Junction-to-Ambient

The steady-state estimate is T_J ≈ T_A + P_deviceR_{θJA,effective}. The effective thermal resistance must describe the actual mounting and cooling. A datasheet R_θJA measured on one reference board is not automatically the value on another board.

If the dominant heat path is through the case, interface and heatsink, a simplified chain is R_θJC + R_θCS + R_θSA. Board and lead paths can be parallel paths, so do not add a reference-board R_θJA to that chain. If case temperature is measured at its defined reference point, use T_J ≈ T_C + P_deviceR_θJC only where the device and heat-flow model make that relation appropriate.

Term	What must be established	Design lever
Junction to case	Exact package, device and case reference	Device/package selection
Case to sink	Interface, insulation and mounting pressure	Pad, surface preparation and mounting
Sink to ambient	Airflow, orientation and enclosure	Heatsink and cooling arrangement
Board paths	Copper, layers, vias and nearby heat sources	PCB thermal layout

Calculate loss at an assumed temperature, estimate temperature from that loss, and update the resistance. Check that the results agree. Convergence in a simple example does not establish stability for every device or cooling arrangement. A diverging estimate requires a review of the loss and heat-removal models. Pulses require transient thermal impedance and the actual duty history, rather than just a steady-state resistance.

The thermal-path guide and D2PAK thermal discussion explain related mounting considerations. Their numerical values are not substitutes for the selected MOSFET’s data.

Derating the SOA for Sustained Load

A fully enhanced MOSFET, a device operating in its linear region, and a device carrying an inrush pulse face different constraints. The I²R channel model applies to fully enhanced, resistive operation; it does not establish that every voltage-current point is safe.

Check the selected device’s current, voltage, temperature and package limits. For sustained linear operation, consult its DC safe-operating-area data and applicable temperature conditions. For pulses, use the relevant pulse SOA, transient thermal impedance and repetition assumptions. Do not replace those checks with a single steady-state heatsink calculation.

Toshiba’s electrical-characteristics application note distinguishes on-resistance, threshold, switching and body-diode parameters. The SOA reading guide covers the operating-region checks in more detail.

A 24 V MOSFET Switch Thermal Worksheet

This is an illustrative steady-state calculation, not a tested Good-Ark part or an approved 15 A design. Assume a fully enhanced 24 V load switch carrying 15 A DC, a 55 °C ambient, and an effective 3.5 K/W junction-to-ambient heat path. Consider only channel conduction loss.

Use an assumed resistance model R(T) = 0.008 Ω × [1 + 0.006 K⁻¹×(T − 25 °C)]. The 8 mΩ reference and temperature slope are teaching assumptions, not a universal MOSFET curve. A real design must replace them with the selected device’s data at the actual gate drive.

Iteration	Assumed TJ	Resistance multiplier	I²R loss	Calculated TJ
1	125.000 °C	1.60000	2.8800 W	65.080 °C
2	65.080 °C	1.24048	2.2329 W	62.815 °C
3	62.815 °C	1.22689	2.2084 W	62.729 °C
4	62.729 °C	1.22638	2.2075 W	62.726 °C

Each row uses T_next = 55 °C + 3.5 K/W × 15² A² × R(T). Solving the same linear model directly gives approximately 62.726 °C, consistent with the iteration. As a separate arithmetic check, 15² × 8 mΩ × 1.25 is 2.25 W.

The agreement checks the calculation, not the hardware. Include relevant switching and diode losses, package and SOA limits, supply transients and the real cooling arrangement before approving a design. For device selection, continue to the power MOSFET selection guide.

Continue through this engineering topic

For the complete selection, design, verification, and troubleshooting path, explore the MOSFET IGBT and Transistor Hub.

• Practical guide: When the Job Calls for IGBT Instead of a MOSFET: Voltage, Switching, and Total Cost
• Practical guide: Staying Inside the SOA: Reading MOSFET Safe-Operating-Area Curves for Repetitive Pulses
• Practical guide: MOSFET Selection for a Switching Power Supply: Voltage, RDS(on), and the D-Series Trade
• Ask Good-Ark technical support about this application